In an era defined by the exponential growth of artificial intelligence (AI), the demand for faster, more efficient data transmission has never been greater. Silicon photonics has emerged as a critical technology to overcome the limitations of traditional electrical interconnects, enabling next‑generation computing, sensing, and communication systems. At the forefront of this field is Dr. Luo Xianshu, a recognised leader in silicon photonic integration and heterogeneous integration platform development.
With a Ph.D. from the Hong Kong University of Science and Technology and extensive experience spanning research, entrepreneurship, and institutional leadership, Dr. Luo has played a key role in advancing silicon photonics from concept to commercialisation. He currently serves as Head of the Photonics & Sensors Department at A*STAR’s Institute of Microelectronics (A*STAR IME) and Vice President of Silicon Photonics Platform Technology at Singapore’s National Semiconductor Translation and Innovation Centre (NSTIC (Advanced Photonics)), part of the broader A*STAR-led NSTIC initiative. He guides strategic initiatives aimed at strengthening the photonics ecosystem—from prototyping and standardisation to talent development.
In APE’s Photonics Spotlight series, Dr. Luo shares his insights on how silicon photonics and co-packaged optics (CPO) are addressing AI interconnect bottlenecks, the ecosystem challenges for photonics heterogeneous integration (PHI), and the roadmap for emerging applications such as LiDAR, biosensing, and quantum computing. He also discusses NSTIC (Advanced Photonics) role in accelerating innovation and his outlook for Asia Photonics Expo 2026 as a catalyst for industry research collaboration.
Q: The training of large AI models has driven enormous demand for high-speed interconnects in data centres. How do you see silicon photonics addressing the interconnect bottlenecks in AI computing? What are the application prospects of co-packaged optics (CPO) in AI hardware, such as GPU clusters? Which key performance metrics does silicon photonics need to advance, and how is NSTIC positioned in delivering AI optical interconnect and CPO solutions?
A: Silicon photonics is becoming essential for AI computing because it overcomes the limits of electrical interconnects. As GPU clusters scale, copper links struggle to deliver the required bandwidth and reach without excessive power consumption. Silicon photonics can provide higher bandwidth density, better signal integrity over distance, and improved energy efficiency.
Co-packaged optics (CPO) extends this advantage by placing optical engines adjacent to the switch or ASIC. This reduces long electrical SerDes paths, reduces power requirements, and enables higher aggregate bandwidth for next-generation GPU clusters and data centre networks. For large GPU clusters, CPO is widely seen as the next step for scaling both intra-rack and rack-to-rack connectivity.
Key performance metrics that silicon photonics must continue to improve include:
- Energy per bit (moving toward pJ/bit),
- Lane data speed (200-800G per lane),
- Insertion loss and coupling efficiency,
- Thermal robustness near hot ASICs, and
- Manufacturing yield and cost for volume production.
National Semiconductor Translation and Innovation Centre (NSTIC), a national platform hosted by A*STAR, supports R&D by developing talent and offering pilot-line, packaging and test infrastructure. NSTIC (Advanced Photonics) advances silicon photonics and photonics heterogeneous integration capabilities; it helps companies to prototype and de-risk their optical engines and CPO-relevant sub-assemblies, while developing scalable integration and packaging solutions for industry adoption.
Q: Co-packaged optics (CPO) technology is seen as a key enabler for next-generation AI data centres, but large-scale deployment requires coordination across the entire industry ecosystem. What challenges do you foresee in building this ecosystem to achieve commercial breakthroughs? Specifically, in areas such as optical chip design, packaging processes, testing standards, and supply chain management, what new collaboration models are needed? What initiatives does NSTIC (Advanced Photonics) have to promote CPO technology standardisation and ecosystem development?
A: The main challenge with CPO is that its success depends on the entire ecosystem moving together, from optical chip design and electro-optical co-design to packaging, testing, and qualification. Today, these activities are often fragmented, with limited common reference architectures or standardised test approaches, which slows interoperability and large-scale deployment.
To address this, the industry needs closer co-development between chip makers, optics suppliers, system players, and end users, supported by shared platforms for prototyping and evaluation.
NSTIC (Advanced Photonics) contributes by providing heterogeneous integration and prototyping capabilities, and by convening industry and research partners to align on processes, packaging approaches, and reliability considerations. This helps support early standardisation and ecosystem alignment for CPO adoption.
Q: The success of silicon photonics depends on a mature ecosystem. What are the current gaps in the supply chain — from design tools and Process Design Kits (PDKs) to standardised packaging — and how is the industry working to address them?
A: The silicon photonics ecosystem still faces gaps across the supply chain. Design tools, design flows, and PDKs remain less standardised than in CMOS, which limits interoperability and slows time-to-market. Packaging also remains a major bottleneck, because achieving low-loss, high-yield optical-electronic integration at scale is complex and often requires customised solutions.
To address this, the industry is moving towards greater collaboration and standardisation. Efforts include developing more open PDKs and reference designs, building modular packaging platforms that can scale, and using consortia and pilot-line facilities to share best practices and accelerate standardisation. Together, these efforts strengthen interoperability and help build a more robust, end-to-end ecosystem that supports reliable volume deployment and broader commercial adoption of silicon photonics.
Dr. Luo Xianshu, Principal Scientist, and Head of Photonics & Sensors Department at A*STAR IME, Vice President, Silicon Photonics Technology, NSTIC
Q: What are the key challenges facing photonics heterogeneous integration (PHI) technology in scaling from laboratory demonstrations to commercial manufacturing, particularly when integrating materials like silicon, lithium niobate, and III-V compounds? Which integration approaches offer the best potential for addressing industry concerns around yield, cost, and manufacturability while maintaining the performance and reliability required for large-scale adoption?
A: The main challenges in photonics heterogeneous integration (PHI) are achieving high-yield bonding between dissimilar materials, managing thermal and mechanical mismatches, and maintaining performance and reliability at wafer scale using CMOS-compatible processes. While many approaches work well at small scale, manufacturability and long-term reliability remain the key barriers to large-scale adoption.
Among the available approaches, wafer-scale die-to-wafer bonding of III-V materials and lithium niobate onto silicon photonics wafers offers the strongest commercial potential. It supports large-wafer processing, allows multiple materials to be integrated on a common platform, and limits the use of expensive materials to where they are needed. These advantages directly address industry concerns around yield, cost, and repeatability.
NSTIC (Advanced Photonics) focuses on advancing PHI with an emphasis on scalable, industry-ready integration. By prioritising manufacturability alongside performance, NSTIC (Advanced Photonics) helps shorten the transition from research to commercial production and de-risks adoption for industry partners.
Q: As a key leader at NSTIC (Advanced Photonics), what specific initiatives or platforms is your institution developing to support the broader silicon photonics ecosystem in Singapore and beyond, particularly in areas such as prototyping, standardisation, and talent development?
A: NSTIC (Advanced Photonics) advances photonics technologies that translate into industry and economic impact. Building on more than two decades of silicon photonics research, a key thrust of our work focuses on advancing the photonics heterogeneous integration (PHI) platform, that enables diverse materials such as silicon, lithium niobate, and III-V semiconductors to be integrated on a common wafer-scale platform.
NSTIC (Advanced Photonics) supports the ecosystem in three ways. We provide pilot fabrication and integration capabilities for prototyping and early validation. We contribute baseline design rules, integration approaches, and test methodologies that improve repeatability and support standardisation. We also build talent by training engineers and students in silicon photonics, PHI, packaging, and chip- and wafer-level testing, working closely with industry and academia to strengthen the long-term pipeline.
Q: Beyond traditional data communication markets, silicon photonics technology is expanding into emerging fields such as LiDAR, biosensing, and quantum computing. From both technology development and commercialisation perspectives, what unique requirements do these applications impose on silicon photonics? Which emerging application area do you anticipate will drive the most significant growth in the silicon photonics industry over the next five years?
A: Emerging applications place different demands on silicon photonics than data communications. LiDAR demands high-power, low-noise lasers and precise beam steering, often in compact, ruggedised packages. Biosensing requires ultra-sensitive, low-loss optical detection and compatibility with microfluidics or lab-on-chip platforms. Quantum computing demands exceptionally low-loss, high phase stability, and coherent photonic circuits that can handle single-photon operation.
From a commercial perspective, these applications typically require tight system-level co-design and more specialised packaging, rather than the highly standardised, high-volume model seen in data centres.
Among these areas, LiDAR for autonomous vehicles and sensing for industrial automation are most likely to achieve the strongest growth, given clear market pull and silicon photonics’ ability to deliver compact, scalable and cost-effective solutions.
Q: What are your thoughts/expectations for Asia Photonics Expo 2026?
I look forward to Asia Photonics Expo (APE) 2026 serving as a key platform to showcase the latest advances in silicon photonics, photonics heterogeneous integration, CPO, and emerging optical technologies. The event brings together industry leaders, startups, and researchers, creating valuable opportunities for collaboration, knowledge exchange, and ecosystem building across Asia.
I also anticipate seeing more practical demonstrations of co-packaged optics, integrated photonic modules and PHI-enabled systems. These showcases can offer useful insights into commercialisation trends and help accelerate adoption of advanced photonic solutions.
Overall, I hope APE continues to strengthen its role in aligning the Asia photonics ecosystem around technology roadmaps, partnerships, and standardisation. Over time, APE has the potential to grow into one of Southeast Asia’s leading photonics exhibition platforms, alongside events such as OFC, CIOE, and ECOC.
Dr. Luo Xianshu’s Biography
Dr. Luo received his Ph.D. in Electrical and Computer Engineering from The Hong Kong University of Science and Technology (HKUST) in 2010, specialising in silicon photonics. He began his career as a Scientist at A*STAR’s Institute of Microelectronics (A*STAR IME), focusing on silicon photonic integrated circuits (Si-PICs) and heterogeneous optoelectronic integration. In 2017, he co-founded Advanced Micro Foundry (AMF), where he led the development of silicon photonics integration platforms and Process Design Kits (PDKs). He returned to A*STAR IME in 2023 as a Principal Scientist and, in 2024, was appointed Head of the Photonics & Sensors Department at A*STAR IME and Vice President of Silicon Photonics Platform Technology at the National Semiconductor Translation and Innovation Centre (NSTIC (Advanced Photonics)), part of the broader A*STAR-led NSTIC initiative, where he leads the development of next-generation multi-material photonics integration.
Dr. Luo is a Fellow of Optica, a Senior Member of IEEE, a Lifetime Member of SPIE, and a member of PMI. He currently serves as Editorial Board Members for Advanced Photonics Nexus and PhotoniX Synergy. He previously served as Associate Editor of Photonics Research (2022-2025) and IEEE Photonics Technology Letters (2020–2024) and Guest Editor of the IEEE Journal of Selected Topics in Quantum Electronics Focus Issue on Hybrid Integration for Silicon Photonics (2020–2022). He also actively contributes to major international conferences such as the IEEE Photonics Conference and the IEEE Silicon Photonics Conference. He has authored or co-authored over 200 publications, contributed to 5 book chapters, and holds more than 30 patents.
